Bài giảng Computer Architecture: Chapter 6 - Prof. Jerry Breecher

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Cùng tìm hiểu Storage Systems là nội dung chương 6 thuộc bộ bài giảng Computer Architecture sẽ giới thiệu tới các bạn Introduction; types of Storage Devices; Busses - Connecting IO Devices to CPU/Memory Interrupts etc, How is data transferred;...

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Nội dung Text: Bài giảng Computer Architecture: Chapter 6 - Prof. Jerry Breecher

Computer Architecture Chapter 6 Storage Systems Prof. Jerry Breecher CSCI 240 Fall 2003
Chapter Overview 6.1 Introduction 6.2 Types of Storage Devices 6.3 Busses - Connecting IO Devices to CPU/Memory. Interrupts etc. How is data transferred. 6.5 Reliability, Availability and RAID Chap. 6 Storage 2
The Big Picture: Where are Introduction We Now? 6.1 Introduction 6.2 Types of Storage Devices We will look at how devices (especially disks) are put together. 6.3 Busses - Connecting IO Devices to CPU/Memory. Interrupts etc. How is We’ll look at how to connect IO devices to the data transferred. CPU. 6.5 Reliability, Availability and RAID And then we’ll look at RAID, the brainchild of Patterson and his buddies. Chap. 6 Storage 3
The Processor Picture Chap. 6 Storage 4
The Processor Picture Processor/Memory Bus PCI Bus I/O Busses Chap. 6 Storage 5
The Processor Picture Processor Processor Processor Processor Registers Registers Registers Registers Cache Cache Cache Cache Memory I/O Chap. 6 Storage 6
Types of Storage Devices 6.1 Introduction In this section we will: 6.2 Types of Storage Devices 6.3 Busses - Connecting IO Take a quick look at how disks work. Devices to CPU/Memory. This is only one example of IO, but we Interrupts etc. How is will save networks, tapes, etc. for data transferred. another course. 6.5 Reliability, Availability and RAID Chap. 6 Storage 7
Types of Storage Disk Device Terminology Devices • Purpose: – Long-term, nonvolatile storage – Large, inexpensive, slow level in the storage hierarchy • Bus Interface: – IDE – SCSI – Small Computer System Interface – Fibre Channel • Transfer rate – About 120 Mbyte/second through the interface bus. – About 5 Mbyte/second off of heads. – Data is moved in Blocks • Capacity – Approaching 100 Gigabytes – Quadruples every 3 years (aerodynamics) – Can be grouped together to get terabytes of data. Chap. 6 Storage 8
Types of Storage Disk Device Terminology Devices Example: Seagate Cheetah ST3146807FC 4 disks, 8 heads 147 Gigabytes 290,000,000 Total Sectors Server 10,000 RPM 50,000 cylinders 4.7 ms avg seek time. Average of 6,000 sectors/cylinder or 800 sectors / Fibre Channel track (but different amounts on each track.) $499.00 MTBF = 1,200,000 hours http://www.seagate.com/cda/products/discsales/marketing/detail/0,1121,355,00.html Chap. 6 Storage 9
Types of Storage Disk Device Terminology Devices These are 4X more capacity than in 2001!!! Example: Barracuda Cheetah ST320822A 200 Gigabytes 2 disks, 4 heads Desktop 7,200 RPM 390,000,000 Total Sectors 8.5 ms avg seek time. 24,000 cylinders ATA Average of 16,000 sectors/cylinder or 400 sectors / track (but different amounts on each $299.00 track.) http://www.seagate.com/support/disc/manuals/fc/100195490b.pdf MTBF = ???????????? hours Chap. 6 Storage 10
Types of Storage Performance of Magnetic Disks Devices Track Response time Sector = Queue + Controller + Seek + Rot + Xfer Service time Cylinder Platter Head 15,000 RPM = 240 RPS => 4 ms per rev Average rotational latency = 2 ms 500 sectors per track => 0.10 ms per sector Read Write Electronics 512 bytes per sector => 5,000,000 MB / s Cache Cache (controller) Data Control Chap. 6 Storage 11
Busses 6.1 Introduction In this section we will: 6.2 Types of Storage Devices 6.3 Busses - Connecting IO Look at various bus mechanisms. Devices to CPU/Memory In very simple terms, a bus is the 6.4 I/O Performance connection between various Measures chips/components in the computer. 6.5 Reliability, Availability and RAID The bus is responsible for sending data/control between these various components. Chap. 6 Storage 12
Busses Interconnect Trends • Interconnect = glue that interfaces computer system components • High speed hardware interfaces + logical protocols • Networks, channels, backplanes Network Channel Backplane Connects Machines Devices Chips Distance >1000 m 10 100 m 0.1 m Bandwidth 10 1000 Mb/s 40 1000 Mb/s 320 2000+ Mb/s Latency high ( 1ms) medium low (Nanosecs.) Reliability low medium high Extensive CRC Byte Parity Byte Parity message-based memory-mapped narrow pathways wide pathways distributed arbitration centralized arbitration Chap. 6 Storage 13
Busses A Computer System with One Bus: Backplane Bus Backplane Bus Processor Memory I/O Devices • A single bus (the backplane bus) is used for: – Processor to memory communication – Communication between I/O devices and memory • Advantages: Simple and low cost • Disadvantages: slow and the bus can become a major bottleneck • Example: IBM PC - AT Chap. 6 Storage 14
Busses A Two-Bus System Processor Memory Bus Processor Memory Bus Bus Bus Adaptor Adaptor Adaptor I/O I/O I/O Bus Bus Bus • I/O buses tap into the processor-memory bus via bus adaptors: – Processor-memory bus: mainly for processor-memory traffic – I/O buses: provide expansion slots for I/O devices • Apple Macintosh-II – NuBus: Processor, memory, and a few selected I/O devices – SCCI Bus: the rest of the I/O devices Chap. 6 Storage 15
A Three-Bus System Busses Processor Memory Bus Processor Memory Bus Adaptor Bus Adaptor I/O Bus Backplane Bus Bus I/O Bus Adaptor • A small number of backplane buses tap into the processor-memory bus – Processor-memory bus is only used for processor-memory traffic – I/O buses are connected to the backplane bus • Advantage: loading on the processor bus is greatly reduced Chap. 6 Storage 16
North/South Bridge architectures: Busses Processor separate busses Processor Memory Bus Director Memory “backside cache” Bus Adaptor I/O Bus Backplane Bus Bus I/O Bus Adaptor • Separate sets of pins for different functions – Memory bus – Caches – Graphics bus (for fast frame buffer) – I/O busses are connected to the backplane bus • Advantage: – Busses can run at different speeds – Much less overall loading! Chap. 6 Storage 17
Busses What defines a bus? Transaction Protocol Timing and Signaling Specification Bunch of Wires Electrical Specification Physical / Mechanical Characteristics – the connectors Chap. 6 Storage 18
Synchronous and Asynchronous Bus Busses • Synchronous Bus: – Includes a clock in the control lines – A fixed protocol for communication that is relative to the clock – Advantage: involves very little logic and can run very fast – Disadvantages: • Every device on the bus must run at the same clock rate • To avoid clock skew, busses cannot be long if they are fast • Asynchronous Bus: – It is not clocked – It can accommodate a wide range of devices – It can be lengthened without worrying about clock skew – It requires a handshaking protocol Chap. 6 Storage 19
Busses So Far Busses Master Slave °°° Control Lines Address Lines Data Lines Bus Master: has ability to control the bus, initiates transaction Bus Slave: module activated by the transaction Bus Communication Protocol: specification of sequence of events and timing requirements in transferring information. Asynchronous Bus Transfers: control lines (req, ack) serve to orchestrate sequencing. Synchronous Bus Transfers: sequence relative to common clock. Chap. 6 Storage 20