
Parallel processing
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This paper presents a flexible, highperformance implementation of the AES algorithm on a coarse-grained reconfigurable architecture, called MUSRA (Multimedia Specific Reconfigurable Architecture). First, we propose a hardware-software partitioning method for mapping the AES algorithm onto the MUSRA. Second, the parallel and pipelining techniques are considered thoughtfully to increase total computing throughput by efficiently utilizing the computing resources of the MUSRA.
15p
tuongtieume
03-04-2025
5
1
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hính sách đối với học phần •Tham gia học tập trên lớp: đi học đầy đủ, tích cực thảo luận nội dung bài giảng, tham gia chữa bài tập và chuẩn bị bài vở tốt - 20%. •Khả năng tự học, tự nghiên cứu: hoàn thành bài tiểu luận (assignment) theo từng cá nhân. Bài kiểm tra đánh giá giữa kỳ - 20%. •Kết quả thi cuối kỳ - 60%.
54p
edwardlk
01-08-2013
423
39
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Hầu hết các HĐH đều mô phỏng khả năng xử lý song song (Parallel Processing) bằng kỹ thuật điều phối tiến trình (Time Schedule). CPU sẽ được điều phối xoay vòng, mỗi tiến trình chiếm giữ một thời gian của CPU rất ngắn sau đó HĐH sẽ can thiệp và tạm dừng để CPU có khả năng làm việc với tiến trình khác.
103p
hellmaster
14-05-2011
161
40
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Về cơ bản kiến trúc của một vi xử lý gồm những phần cứng sau: - Đơn vị xử lý trung tâm CPU (Central Processing Unit). - Các bộ nhớ (Memories). - Các cổng vào/ra song song (Parallel I/O Ports). - Các cổng vào/ra nối tiếp (Serial I/O Ports). - Các bộ đếm/bộ định thời (Timers). Ngoài ra với mỗi loại vi điều khiển cụ thể còn có thể có thêm một số phần cứng khác như bộ biến đổi tương tự-số ADC, bộ biến đổi số-tương tự DAC, các mạch điều chế dạng sóng WG, điều chế độ rộng xung...
45p
muaythai10
18-11-2011
145
21
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In this study, MCS is applied to compute the reliability of the nodes and the network under uncertain demand and roughness, and to determine how reliability is distributed among the various nodes of WDN, as well as assessing the reliability of the network as a series or parallel system. The effect of the resilience index on the nodal and network reliability is also assessed.
199p
runthenight05
01-03-2023
11
3
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This thesis focuses on four constructs of perceived adverse impacts of climate change, perceived anthropogenic causes of climate change; perceived policy effectiveness, and feasibility to explain Australian public support for mitigation policies. The study draws from major theories in the field such as the Theory of Planned Behaviour, Risk Perception Theory, the Extended Parallel Process Model, and Social Dilemma literature.
216p
runthenight04
02-02-2023
12
2
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In this thesis, motivated by the advantages of the generalized minimumnoise subspace (GMNS) method, recently proposed for array processing, we proposedtwo algorithms for principal subspace analysis (PSA) and two algorithms for tensor de-composition using parallel factor analysis (PARAFAC) and higher-order singular valuedecomposition (HOSVD).
68p
tamynhan0
04-07-2020
10
3
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Lecture “Natural language processing – Chapter 4: Computational linguistics” has contents: What is computational linguistics, corpus definitions, corpus categories, parallel corpora application, alignment methods, normalization, lemmatization and tokenization.
15p
dien_vi01
21-11-2018
18
1
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Parallel Implementation of MAFFT on CUDA-Enabled Graphics Hardware present a new approach to accelerat- ing MAFFT on Graphics Processing Units (GPUs) using the Compute Unified Device Architecture (CUDA) programming model. Compared with the implementations of other MSA algorithms on GPUs, parallelization of MAFFT is more challenging since the space complexity.
14p
ducla78
30-07-2015
52
6
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Parallel corpora are made by human beings. However, as an MT system is an aggregation of state-of-the-art NLP technologies without any intervention of human beings, it is unavoidable that quite a few sentence pairs are beyond its analysis and that will therefore not contribute to the system. Furthermore, they in turn may act against our objectives to make the overall performance worse. Possible unfavorable items are n : m mapping objects, such as paraphrases, non-literal translations, and multiword expressions.
9p
hongphan_1
15-04-2013
75
4
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Cells must be able to process multiple information in parallel and, more-over, they must also be able to combine this information in order to trigger the appropriate response. This is achieved by wiring signalling pathways such that they can interact with each other, a phenomenon often called crosstalk.
14p
inspiron33
25-03-2013
54
3
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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Managing Algorithmic Skeleton Nesting Requirements in Realistic Image Processing Applications: The Case of the SKiPPER-II Parallel Programming Environment’s Operating Model
19p
dauphong20
11-03-2012
49
3
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EURASIP Journal on Applied Signal Processing 2003:13, 1328–1334 c 2003 Hindawi Publishing Corporation Interleaved Convolutional Code and Its Viterbi Decoder Architecture Jun Jin Kong Department of Electrical and Computer Engineering, University of Minnesota, 200 Union Street, Minneapolis, MN 55455, USA Email: jjkong@ece.umn.edu Keshab K. Parhi Department of Electrical and Computer Engineering, University of Minnesota, 200 Union Street, Minneapolis, MN 55455, USA Email: parhi@ece.umn.
7p
sting12
10-03-2012
44
4
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EURASIP Journal on Applied Signal Processing 2003:6, 530–542 c 2003 Hindawi Publishing Corporation An FPGA Implementation of (3, 6)-Regular Low-Density Parity-Check Code Decoder Tong Zhang Department of Electrical, Computer, and Systems Engineering, Rensselaer Polytechnic Institute, Troy, NY 12180, USA Email: tzhang@ecse.rpi.edu Keshab K. Parhi Department of Electrical and Computer Engineering, University of Minnesota, Minneapolis, MN 55455, USA Email: parhi@ece.umn.
13p
sting12
10-03-2012
48
8
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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành hóa học dành cho các bạn yêu hóa học tham khảo đề tài: Editorial Transforming Signal Processing Applications into Parallel Implementations
2p
dauphong19
07-03-2012
48
6
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Hindawi Publishing Corporation EURASIP Journal on Advances in Signal Processing Volume 2008, Article ID 289184, 11 pages doi:10.1155/2008/289184 Research Article Multirate Formulation for Mismatch Sensitivity Analysis of Analog-to-Digital Converters That Utilize Parallel ΣΔ-Modulators ¨ Anton Blad, H˚ kan Johansson, and Per Lowenborg a Division of Electronics Systems, Department of Electrical Engineering, Link¨ping University, Sweden o Correspondence should be addressed to Anton Blad, antonb@isy.liu.
11p
dauphong18
24-02-2012
46
5
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Tuyển tập báo cáo các nghiên cứu khoa học quốc tế ngành y học dành cho các bạn tham khảo đề tài: Implementation science: a role for parallel dual processing models of reasoning?
8p
toshiba25
11-12-2011
52
5
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Segment Design Tradeoffs I. OVERVIEW The six steps in the systems-level design process associated with the software radio are illustrated in Figure 6-1. The tradeoffs proceed from front end to back end. The choice of antennas (step 1 in the figure) determines the number and bandwidth of RF channels (step 2). This, in turn, constrains the numbers and bandwidths of ADCs (step 3). Some waveforms may require dedicated ASICs (e.g., W-CDMA despreaders) in front of the ADCs. Additional parallel IF processing and ADC paths may be necessary to support multiple-service bands simultaneously....
8p
tienvovan
11-09-2010
104
9
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Artificial neural network (ANN) models have been extensively studied with the aim of achieving human-like performance, especially in the field of pattern recognition. These networks are composed of a number of nonlinear computational elements which operate in parallel and are arranged in a manner reminiscent of biological neural interconnections. ANNs are known by many names such as connectionist models, parallel distributed processing models and neuromorphic systems (Lippmann 1987).
8p
doroxon
12-08-2010
120
24
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